Content-addressable memory (CAM) is a special type of computer memory used in certain very-high-speed searching applications. It compares input search data (tag) against a table of stored data, and returns the address of matching data. Binary CAM is the simplest type of CAM which uses data search words consisting entirely of 1 s and 0 s. Ternary CAM (TCAM) allows a third matching state of “X” or “Don't Care” for one or more bits in the stored dataword, thus adding flexibility to the search. For example, a ternary CAM might have a stored word of “10XX0” which will match any of the four search words “10000,” “10010,” “10100,” or “10110.” The added search flexibility comes at an additional cost over binary CAM as the internal memory cell must now encode three possible states instead of the two of binary CAM. TCAMs can be used in networking devices such as switches, routers, etc. For example, when a network switch receives a data frame from one of its ports, it updates an internal table with the frame's source media access control (MAC) address and the port it was received on. It then looks up the destination MAC address in the table to determine what port the frame needs to be forwarded to, and sends it out on that port. The MAC address table can be implemented with a CAM so the destination port can be found very quickly, reducing the switch's latency.
Traditional high performance TCAM's are at the heart of many networking classification solutions. However, TCAMs can be expensive and are available from a few suppliers; thus, TCAMs are used in certain designs where sufficient space, power, and budget permit. Of note, various networking classification products are designed with minimal cost, power, and size constraints which rule out traditional TCAMs. TCAMs can be implemented as field programmable gate arrays (FPGAs) or as dedicated circuits. Disadvantageously, FPGA implementations utilize the address lines as the key and as a result, the amount of memory they use is defined by 2^ key length. This would be exorbitant for a 32 byte key instance. To address this limitations, limited FPGA versions can be constructed using pre-definitions of bit space, such as defining the location of VID1 and VID2 for instance, in conjunction with a parser that identifies VID1 and VID2. Of note, this is complex and inflexible. Also, the FPGA implementation has higher latency than the dedicated circuit implementation, but is lower cost. With the dedicated circuit implementation, an external TCAM is extremely expensive, being the same cost regardless if it is used every 8 clocks or once per clock.